Silent Q

Azog's little slice of the world. Whee.

Time to step back, and, a new toy

| April 11, 2009

I need to step back from trying to learn how to program this CPLD. This is way over my head, at a very deep level that is beyond me. I’ve looked at dozens of tutorials on Verilog and VHDL, and actually decided that ABEL is the way to go. But you’re pretty much working at […]

Time to choose an HDL

| April 5, 2009

For someone who really doesn’t have a clue, I’m kinda having fun playing with this CPLD kit. Right now, I’m using the schematic editor to do various simple things. But I’ve been reading about schematic versus HDLs (hardware description language), and I think I’ve come to an understanding that I really need to learn an […]

An “AHA!” moment

| April 4, 2009

Having gone through the previous steps of creating a project, etc, but not really knowing where the pins are physically connected, I needed to open my eyes a little better. The report from implementation gave a whole slew of information on the target, but I did not notice the “Pins” link on that report… So […]

What did I do?

| April 4, 2009

Continuing on with my CPLD learning (or non-learning) adventure, I did something, but I’m not exactly sure what. Create a new project, with my target hardware I added no sources during project creation, and can add them later Once the empty project was created, I added a source. Several different types are available: VHDL, Verilog, […]

Over my head

| April 3, 2009

Playing around with the CPLD starter kit some more, I realize that I am so over my head it is not funny. To begin with, the software itself is confusing. There are several tools. One is the “ISE WebPACK”, which appears to be only for CPLDs, and is supposedly free. Another higher-level tool is the […]


| April 2, 2009

I’ve been wanting to experiment with programmable logic devices (PLDs) for a while now, but I’ve always been hesitant. I mean, sometimes I can barely grok discrete TTL and basic assembler, how much more difficult are PLDs? And then there is a whole host of choices… PAL/GAL, CPLD, FPGA? Verilog, VHDL, something else altogether? Finally, […]